(Not Applicable)
(Not Applicable)
1. Field of the Invention
The present invention relates generally to semiconductor packages, and more particularly to a lead frame semiconductor package which includes an isolated ring structure to provide common power/ground connections similar to those provided by laminate area array packages.
2. Description of the Related Art
As is well known in the electrical arts, integrated circuit dies or chips are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the integrated circuit die and a substrate such as a printed circuit board or PCB. The elements of the package typically include a metal lead frame, an integrated circuit die, a bonding material used to attach the integrated circuit die to the lead frame, bond wires which electrically connect pads on the integrated circuit die to respective, individual leads or contacts of the lead frame, and a hard plastic encapsulant material which covers the other components and forms the predominant portion of the exterior of the package.
In the chip package, the lead frame is the central supporting structure thereof. A conventional lead frame includes a die pad for accommodating the integrated circuit die, and a plurality of leads or contacts. In many varieties of integrated circuit chip packages, each bond pad provided on the die is wire-bonded to a respective contact, with portions of the contacts or leads protruding from or being exposed within the plastic encapsulant or package body and used to mount or electrically connect the chip package to the printed circuit board. In addition to portions of the leads or contacts being exposed, in certain chip packages, one surface of the die pad is also exposed for purposes of providing a thermally conductive path to dissipate heat from the integrated circuit die which is attached to the opposed surface of the die pad and is internal to the package, i.e., surrounded by the plastic encapsulant.
An overall limitation of the semiconductor chip design as well as the semiconductor package has been the electrical connections and configurations utilized to satisfy the required electrical inputs and outputs to and from the input/output pads. Accordingly, there is a need in the art for improved semiconductor package designs for improved efficiency of the electrical connections and configurations utilized to satisfy the required electrical inputs and outputs to and from the input/output pads.
In accordance with an aspect of the present invention, there is provided a semiconductor package which includes a chip mounting pad having a peripheral edge. The package further includes a semiconductor chip attached to the chip mounting pad. The package further includes a plurality of leads which each have an inner end disposed adjacent the peripheral edge in spaced relation thereto and an opposing distal end. The package includes at least one isolated ring structure electrically connected to the semiconductor chip and at least one of the leads. The ring structure includes a main body portion disposed along the peripheral edge between the peripheral edge and the inner ends of the leads in spaced relation thereto, and at least one stub portion extending angularly from the main body portion and along one of the leads in spaced relation thereto.
Advantageously, the isolated ring structure may be utilized as generic electrical power or ground source for the semiconductor chip. For example, where the semiconductor chip includes multiple input/output pads requiring connection to a common electrical potential, such input/output pads may simply be commonly connected to the ring structure which in turn is connected to a single lead dedicated to attachment to the required power or ground source. This maximizes the number of leads available for various input and output functions of the semiconductor package. In addition, the stub portion of each ring structure is advantageously utilized for maintaining the ring structure in fixed relationship to the chip mounting pad and the leads during fabrication of the semiconductor package. Thus, the stub portion allows for enhanced mechanically stabilization of the internal components of the semiconductor package during fabrication.